_TMS_PIO_CTL Struct Reference

GPIO Control Registers (TMC_BASE_PIO). More...

#include <TMC_BASE_PIO.h>

Data Fields
TM_REG32	CTRL
	Control Register (G0 to 31)(EALLOW PROTECTED) More...
TM_REG32	QSEL1
	Qualifier Select 1 Register (G0 to 15)(EALLOW PROTECTED) More...
TM_REG32	QSEL2
	Qualifier Select 2 Register (G16 to 31)(EALLOW PROTECTED) More...
TM_REG32	MUX1
	MUX 1 Register (G0 to 15)(EALLOW PROTECTED) More...
TM_REG32	MUX2
	MUX 2 Register (G16 to 31)(EALLOW PROTECTED) More...
TM_REG32	DIR
	Direction Register (G0 to 31)(EALLOW PROTECTED) More...
TM_REG32	PUD
	Pull Up Disable Register (G0 to 31)(EALLOW PROTECTED) More...
TM_REG32	Reserved0 [1]

Detailed Description

GPIO Control Registers (TMC_BASE_PIO).

Start at address 0x6F80
See Technical_Reference_Manual

Definition at line 26 of file TMC_BASE_PIO.h.

Field Documentation

CTRL

TM_REG32 CTRL

Control Register (G0 to 31)(EALLOW PROTECTED)

Definition at line 27 of file TMC_BASE_PIO.h.

DIR

TM_REG32 DIR

Direction Register (G0 to 31)(EALLOW PROTECTED)

Definition at line 32 of file TMC_BASE_PIO.h.

MUX1

TM_REG32 MUX1

MUX 1 Register (G0 to 15)(EALLOW PROTECTED)

Definition at line 30 of file TMC_BASE_PIO.h.

MUX2

TM_REG32 MUX2

MUX 2 Register (G16 to 31)(EALLOW PROTECTED)

Definition at line 31 of file TMC_BASE_PIO.h.

PUD

TM_REG32 PUD

Pull Up Disable Register (G0 to 31)(EALLOW PROTECTED)

Definition at line 33 of file TMC_BASE_PIO.h.

QSEL1

TM_REG32 QSEL1

Qualifier Select 1 Register (G0 to 15)(EALLOW PROTECTED)

Definition at line 28 of file TMC_BASE_PIO.h.

QSEL2

TM_REG32 QSEL2

Qualifier Select 2 Register (G16 to 31)(EALLOW PROTECTED)

Definition at line 29 of file TMC_BASE_PIO.h.

Reserved0

TM_REG32 Reserved0[1]

Definition at line 34 of file TMC_BASE_PIO.h.