system_controls.c

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#include <register/TMC_BASE_SCR.h>
#include "system_controls.h"
 
void setSystemControls(void)
{
    EALLOW;
    TMC_BASE_SCR->WDCR = 0xE8;              // Watchdog Control Register    --> Watchdog check --> Disable the watchdog module --> Clear Watchdog reset status flag bit
 
    while(!TMC_BASE_SCR->PLLSTS&0x1);       // Wait for PLL to complete (PLLSTS[PLLLOCKS] = 1) to change PLLSTS[DIVSEL]
    TMC_BASE_SCR->PLLSTS |= (0x1 << 6);     // No external clock --> Disable oscillator fail-detect logic
    TMC_BASE_SCR->PLLSTS |= (0x2 << 7);     // Select Divide By 2 for CLKIN
 
    TMC_BASE_SCR->PLLCR |= 0xA;             // Set the PLL clocking ratio
 
    TMC_BASE_SCR->PCLKCR0 = 0xCFFF;         // Set all Peripheral Clock Control 0 modules (except McBSP) to be clocked by system clock
    TMC_BASE_SCR->PCLKCR1 = 0xFFFF;         // Set all Peripheral Clock Control 1 modules to be clocked by system clock
    TMC_BASE_SCR->PCLKCR3 = 0x2700;         // Set all CPU-Timer and GPIOs to be clocked by system clock
    EDIS;
}