_TMS_PIO Struct Reference

GPIO Control Registers (TMC_BASE_PIO). More...

#include <TMC_BASE_PIO.h>

Data Fields
TMS_PIO_CTL	CTL [3]
	GPACTRL / GPBCTRL / GPCCTRL. More...
TM_REG32	Reserved0 [8]
TMS_PIO_DATA	DATA [3]
	DAT, SET, CLEAR, TOGGLE Register. More...
TM_REG32	Reserved1 [4]
TM_REG16	XINT1SEL
	Input Select Register (GPIO0 to 31)(EALLOW PROTECTED) More...
TM_REG16	XINT2SEL
	Input Select Register (G0 to 31)(EALLOW PROTECTED) More...
TM_REG16	XNMISEL
	Input Select Register (G0 to 31) (EALLOW PROTECTED) More...
TM_REG16	XINT3SEL
	Input Select Register (G32 to 63)(EALLOW PROTECTED) More...
TM_REG16	XINT4SEL
	Input Select Register (G32 to 63)(EALLOW PROTECTED) More...
TM_REG16	XINT5SEL
	Input Select Register (G32 to 63)(EALLOW PROTECTED) More...
TM_REG16	XINT6SEL
	Input Select Register (G32 to 63)(EALLOW PROTECTED) More...
TM_REG16	XINT7SEL
	Input Select Register (G32 to 63)(EALLOW PROTECTED) More...
TM_REG32	LPMSEL
	Select Register (G0 to 31)(EALLOW PROTECTED) More...

Detailed Description

GPIO Control Registers (TMC_BASE_PIO).

Start at address 0x6F80
See Technical_Reference_Manual

Definition at line 41 of file TMC_BASE_PIO.h.

Field Documentation

CTL

TMS_PIO_CTL CTL[3]

GPACTRL / GPBCTRL / GPCCTRL.

Definition at line 42 of file TMC_BASE_PIO.h.

DATA

TMS_PIO_DATA DATA[3]

DAT, SET, CLEAR, TOGGLE Register.

Definition at line 44 of file TMC_BASE_PIO.h.

LPMSEL

TM_REG32 LPMSEL

Select Register (G0 to 31)(EALLOW PROTECTED)

Definition at line 54 of file TMC_BASE_PIO.h.

Reserved0

TM_REG32 Reserved0[8]

Definition at line 43 of file TMC_BASE_PIO.h.

Reserved1

TM_REG32 Reserved1[4]

Definition at line 45 of file TMC_BASE_PIO.h.

XINT1SEL

TM_REG16 XINT1SEL

Input Select Register (GPIO0 to 31)(EALLOW PROTECTED)

Definition at line 46 of file TMC_BASE_PIO.h.

XINT2SEL

TM_REG16 XINT2SEL

Input Select Register (G0 to 31)(EALLOW PROTECTED)

Definition at line 47 of file TMC_BASE_PIO.h.

XINT3SEL

TM_REG16 XINT3SEL

Input Select Register (G32 to 63)(EALLOW PROTECTED)

Definition at line 49 of file TMC_BASE_PIO.h.

XINT4SEL

TM_REG16 XINT4SEL

Input Select Register (G32 to 63)(EALLOW PROTECTED)

Definition at line 50 of file TMC_BASE_PIO.h.

XINT5SEL

TM_REG16 XINT5SEL

Input Select Register (G32 to 63)(EALLOW PROTECTED)

Definition at line 51 of file TMC_BASE_PIO.h.

XINT6SEL

TM_REG16 XINT6SEL

Input Select Register (G32 to 63)(EALLOW PROTECTED)

Definition at line 52 of file TMC_BASE_PIO.h.

XINT7SEL

TM_REG16 XINT7SEL

Input Select Register (G32 to 63)(EALLOW PROTECTED)

Definition at line 53 of file TMC_BASE_PIO.h.

XNMISEL

TM_REG16 XNMISEL

Input Select Register (G0 to 31) (EALLOW PROTECTED)

Definition at line 48 of file TMC_BASE_PIO.h.