_TMS_CAN Struct Reference

CAN Register (TMC_BASE_CANA / TMC_BASE_CANB). More...

#include <TMC_BASE_CAN.h>

Data Fields
TM_REG32	ME
	Mailbox enable. More...
TM_REG32	MD
	Mailbox direction. More...
TM_REG32	TRS
	Transmit request set. More...
TM_REG32	TRR
	Transmit request reset. More...
TM_REG32	TA
	Transmission acknowledge. More...
TM_REG32	AA
	Abort acknowledge. More...
TM_REG32	RMP
	Receive message pending. More...
TM_REG32	RML
	Receive message lost. More...
TM_REG32	RFP
	Remote frame pending. More...
TM_REG32	GAM
	Global acceptance mask. More...
TM_REG32	MC
	Master control. More...
TM_REG32	BTC
	Bit-timing configuration. More...
TM_REG32	ES
	Error and status. More...
TM_REG32	TEC
	Transmit error counter. More...
TM_REG32	REC
	Receive error counter. More...
TM_REG32	GIF0
	Global interrupt flag 0. More...
TM_REG32	GIM
	Global interrupt mask. More...
TM_REG32	GIF1
	Global interrupt flag 1. More...
TM_REG32	MIM
	Mailbox interrupt mask. More...
TM_REG32	MIL
	Mailbox interrupt level. More...
TM_REG32	OPC
	Overwrite protection control. More...
TM_REG32	TIOC
	TX I/O control. More...
TM_REG32	RIOC
	RX I/O control. More...
TM_REG32	TSC
	Time stamp counter (Reserved in SCC mode) More...
TM_REG32	TOC
	Time-out control (Reserved in SCC mode) More...
TM_REG32	TOS
	Time-out status (Reserved in SCC mode) More...
TM_REG32	Reserved0 [6]
TM_REG32	LAM [32]
	Local-Acceptance-Mask Register. More...
TM_REG32	MOTS [32]
	Message Object Time Stamp Registers. More...
TM_REG32	MOTO [32]
	Message-Object Time-Out Registers. More...
TMS_CAN_MO	MO [32]
	Mailboxes. More...

Detailed Description

CAN Register (TMC_BASE_CANA / TMC_BASE_CANB).

Start at address 0x6000
See Technical_Reference_Manual

Definition at line 24 of file TMC_BASE_CAN.h.

Field Documentation

AA

TM_REG32 AA

Abort acknowledge.

Definition at line 30 of file TMC_BASE_CAN.h.

BTC

TM_REG32 BTC

Bit-timing configuration.

Definition at line 36 of file TMC_BASE_CAN.h.

ES

TM_REG32 ES

Error and status.

Definition at line 37 of file TMC_BASE_CAN.h.

GAM

TM_REG32 GAM

Global acceptance mask.

Definition at line 34 of file TMC_BASE_CAN.h.

GIF0

TM_REG32 GIF0

Global interrupt flag 0.

Definition at line 40 of file TMC_BASE_CAN.h.

GIF1

TM_REG32 GIF1

Global interrupt flag 1.

Definition at line 42 of file TMC_BASE_CAN.h.

GIM

TM_REG32 GIM

Global interrupt mask.

Definition at line 41 of file TMC_BASE_CAN.h.

LAM

TM_REG32 LAM[32]

Local-Acceptance-Mask Register.

Definition at line 52 of file TMC_BASE_CAN.h.

MC

TM_REG32 MC

Master control.

Definition at line 35 of file TMC_BASE_CAN.h.

MD

TM_REG32 MD

Mailbox direction.

Definition at line 26 of file TMC_BASE_CAN.h.

ME

TM_REG32 ME

Mailbox enable.

Definition at line 25 of file TMC_BASE_CAN.h.

MIL

TM_REG32 MIL

Mailbox interrupt level.

Definition at line 44 of file TMC_BASE_CAN.h.

MIM

TM_REG32 MIM

Mailbox interrupt mask.

Definition at line 43 of file TMC_BASE_CAN.h.

MO

TMS_CAN_MO MO[32]

Mailboxes.

Definition at line 55 of file TMC_BASE_CAN.h.

MOTO

TM_REG32 MOTO[32]

Message-Object Time-Out Registers.

Definition at line 54 of file TMC_BASE_CAN.h.

MOTS

TM_REG32 MOTS[32]

Message Object Time Stamp Registers.

Definition at line 53 of file TMC_BASE_CAN.h.

OPC

TM_REG32 OPC

Overwrite protection control.

Definition at line 45 of file TMC_BASE_CAN.h.

REC

TM_REG32 REC

Receive error counter.

Definition at line 39 of file TMC_BASE_CAN.h.

Reserved0

TM_REG32 Reserved0[6]

Definition at line 51 of file TMC_BASE_CAN.h.

RFP

TM_REG32 RFP

Remote frame pending.

Definition at line 33 of file TMC_BASE_CAN.h.

RIOC

TM_REG32 RIOC

RX I/O control.

Definition at line 47 of file TMC_BASE_CAN.h.

RML

TM_REG32 RML

Receive message lost.

Definition at line 32 of file TMC_BASE_CAN.h.

RMP

TM_REG32 RMP

Receive message pending.

Definition at line 31 of file TMC_BASE_CAN.h.

TA

TM_REG32 TA

Transmission acknowledge.

Definition at line 29 of file TMC_BASE_CAN.h.

TEC

TM_REG32 TEC

Transmit error counter.

Definition at line 38 of file TMC_BASE_CAN.h.

TIOC

TM_REG32 TIOC

TX I/O control.

Definition at line 46 of file TMC_BASE_CAN.h.

TOC

TM_REG32 TOC

Time-out control (Reserved in SCC mode)

Definition at line 49 of file TMC_BASE_CAN.h.

TOS

TM_REG32 TOS

Time-out status (Reserved in SCC mode)

Definition at line 50 of file TMC_BASE_CAN.h.

TRR

TM_REG32 TRR

Transmit request reset.

Definition at line 28 of file TMC_BASE_CAN.h.

TRS

TM_REG32 TRS

Transmit request set.

Definition at line 27 of file TMC_BASE_CAN.h.

TSC

TM_REG32 TSC

Time stamp counter (Reserved in SCC mode)

Definition at line 48 of file TMC_BASE_CAN.h.