TMS320F28335 Library  1.0
Documentation
eqep.c
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1 
5 #include "global_defines.h"
10 #include "eqep.h"
11 
12 //ISR Function declarations
13 __interrupt void eQEPisr1(void);
14 __interrupt void eQEPisr2(void);
15 
16 //global variables for calculation and returns
21 
22 #ifndef EQEP_EQEP_C_
23 #define EQEP_EQEP_C_
24 
34  TMPS_EQEP eQEP_module; // Create variable for register-access
35  switch(eQEP.QEPA){
36  case 20: switch(eQEP.QEPB){
37  case 21: EALLOW; // Allow Register writes
38  TMC_BASE_PIO->CTL[0].PUD &= ~((Uint32)0x1 << 20); // Enable pull-up on GPIO20 (EQEP1A)
39  TMC_BASE_PIO->CTL[0].QSEL2 &= ~((Uint32)0x3 << 8); // Sync to SYSCLKOUT GPIO20 (EQEP1A)
40  TMC_BASE_PIO->CTL[0].MUX2 |= ((Uint32)0x1 << 8); // Configure GPIO20 as EQEP1A
41  TMC_BASE_PIO->CTL[0].PUD &= ~((Uint32)0x1 << 21); // Enable pull-up on GPIO21 (EQEP1B)
42  TMC_BASE_PIO->CTL[0].QSEL2 &= ~((Uint32)0x3 << 10); // Sync to SYSCLKOUT GPIO21 (EQEP1B)
43  TMC_BASE_PIO->CTL[0].MUX2 |= ((Uint32)0x1 << 10); // Configure GPIO21 as EQEP1B
44  g_lines_of_encoder_eQEP1 = eQEP.lines_of_encoder; // Prepare variable for calculations
45  break;
46  default: return -2; // Invalid input parameter
47  }
48  DINT; // Disable Interrupts
49  EALLOW;
50  TMC_BASE_INT_REGS->EQEP1_INT = (Uint32)eQEPisr1; // Assign Interrupt Service Routine
51  EDIS; // Protect register
52  TMC_BASE_PIE->CTRL |= 0x01; // Enable PIE block
53  TMC_BASE_PIE->GROUP[4].IER |= 0x1; // Enable in the PIE: Group 5 interrupt 1
54  IER |= 0x0010; // Enable Interrupt group
55  EINT; // Enable Interrupts
56  eQEP_module = TMC_BASE_EQEP1; // Assign Register-address to variable for register access
57  break;
58  case 24: switch(eQEP.QEPB){
59  case 25: EALLOW; // Allow Register writes
60  TMC_BASE_PIO->CTL[0].PUD &= ~((Uint32)0x1 << 24); // Enable pull-up on GPIO24 (EQEP2A)
61  TMC_BASE_PIO->CTL[0].QSEL2 &= ~((Uint32)0x3 << 16); // Sync to SYSCLKOUT GPIO24 (EQEP2A)
62  TMC_BASE_PIO->CTL[0].MUX2 |= ((Uint32)0x2 << 16); // Configure GPIO24 as EQEP2A
63  TMC_BASE_PIO->CTL[0].PUD &= ~((Uint32)0x1 <<25); // Enable pull-up on GPIO25 (EQEP2B)
64  TMC_BASE_PIO->CTL[0].QSEL2 &= ~((Uint32)0x3 << 18); // Sync to SYSCLKOUT GPIO25 (EQEP2B)
65  TMC_BASE_PIO->CTL[0].MUX2 |= ((Uint32)0x2 << 18); // Configure GPIO25 as EQEP2B
66  g_lines_of_encoder_eQEP2 = eQEP.lines_of_encoder; // Prepare variable for calculations
67  break;
68  default: return -2; // Invalid input parameter
69  }
70  DINT; // Disable Interrupts
71  EALLOW;
72  TMC_BASE_INT_REGS->EQEP2_INT = (Uint32)eQEPisr2; // Assign Interrupt Service Routine
73  EDIS; // Protect register
74  TMC_BASE_PIE->CTRL |= 0x01; // Enable PIE block
75  TMC_BASE_PIE->GROUP[4].IER |= 0x2; // Enable in the PIE: Group 5 interrupt 2
76  IER |= 0x0010; // Enable Interrupt group
77  EINT; // Enable Interrupts
78  eQEP_module = TMC_BASE_EQEP2; // Assign Register-address to variable for register access
79  break;
80  default: return -1; // Invalid input parameter
81  }
82  EDIS;
83 
84  //QEP quadrature count mode
85  eQEP_module->QUPRD = 0xE4E1C0; // Unit Timer for 10 Hz at 150 MHz SYSCLKOUT
86  eQEP_module->QDECCTL &= ~((Uint32)0x3 << 14); // QEP quadrature count mode
87  eQEP_module->QEPCTL &= ~((Uint32)0x3 << 14); // Stop at breakpoint
88 
89  eQEP_module->QPOSMAX = 0xFFFFFFFF; // Maximum Position Count
90  eQEP_module->QEPCTL |= (0x1 << 12); // Position counter reset on maximum position
91  eQEP_module->QEPCTL |= (0x1 << 3); // QEP enable
92  eQEP_module->QEPCTL |= (0x1 << 2); // Latch on unit time out: Position counter, capture timer and capture period values are latched into QPOSLAT, QCTMRLAT and QCPRDLAT registers
93  eQEP_module->QEPCTL |= (0x1 << 1); // Enable Unit Timer
94 
95  eQEP_module->QEINT &= ~(0xFFE); // Disable all interrupts:
96  eQEP_module->QEINT |= ((Uint32) 0x1 << 11); // Enable UNit time out interrupt
97  eQEP_module->QCLR |= 0xFFF; // Clear Interrupt flags
98 
99  return 0;
100 }
101 
111  TMPS_EQEP eQEP_module;
112  if(eQEP.QEPA == GPIO20){
113  eQEP_module = TMC_BASE_EQEP1; // Assign Register-address to variable for register access
114  }
115  else if(eQEP.QEPA == GPIO24){
116  eQEP_module = TMC_BASE_EQEP2; // Assign Register-address to variable for register access
117  }
118  else{
119  return -1;
120  }
121  return ((eQEP_module->QEPSTS >> 5)& 0x1); // Return direction value
122 }
123 
132  if(eQEP.QEPA == GPIO20){
133  return g_rpm_eQEP_1; // Return rpm value
134  }
135  else if(eQEP.QEPA == GPIO24){
136  return g_rpm_eQEP_2; // Return rpm value
137  }
138  else{
139  return -1;
140  }
141 }
142 
149 __interrupt void eQEPisr1(void){
150  TMPS_EQEP eQEP_module = TMC_BASE_EQEP1;
151  static Uint32 pos[2];
152  signed long pos_diff=0;
153  Uint16 counts_per_sec=0;
154  float32 revolution_per_sec=0;
155 
156  //SPEED MEASUREMENT
157  pos[0] = pos[1]; // Latch old position
158  pos[1]=eQEP_module->QPOSLAT; // Get new Position of QPOSCNT
159 
160  if(eQEP_module->QEPSTS & 0x20){ // if clockwise direction
161  pos_diff = (signed long)(pos[1] - pos[0]); // Calc diff
162  if(pos_diff<0){
163  pos_diff += 0xFFFFFFFF; // Check overflow
164  }
165  }
166  else{ // Else anticlockwise direction
167  pos_diff = (signed long)(pos[0] - pos[1]); // Calc diff
168  if(pos_diff<0){
169  pos_diff += 0xFFFFFFFF; // Check underflow
170  }
171  }
172 
173  counts_per_sec = pos_diff * 10; // Pos_diff * frequency (10 Hz) --> 10 = (F_CPU / eQEP_module->QUPRD);
174  revolution_per_sec = (float) counts_per_sec / (g_lines_of_encoder_eQEP1 * 4.0); // Divide all QPOSCNTS with clocks genearted by one revolution
175  g_rpm_eQEP_1 = (revolution_per_sec * 60); // Calc rpm
176 
177  eQEP_module->QCLR |= 0xFFF; // Clear all Interrupt flags
178  TMC_BASE_PIE->ACK |= 0x0010; // Interrupt ACK
179 }
180 
187 __interrupt void eQEPisr2(void){
188  TMPS_EQEP eQEP_module = TMC_BASE_EQEP2;
189  static Uint32 pos[2];
190  signed long pos_diff=0;
191  Uint16 counts_per_sec=0;
192  float32 revolution_per_sec=0;
193 
194  //SPEED MEASUREMENT
195  pos[0] = pos[1]; // Latch old value
196  pos[1]=eQEP_module->QPOSLAT; // Get new value of QPOSCNT
197 
198  if(eQEP_module->QEPSTS & 0x20){ // If clockwise direction
199  pos_diff = (signed long)(pos[1] - pos[0]); // Calc diff
200  if(pos_diff<0){
201  pos_diff += 0xFFFFFFFF; // Check overflow
202  }
203  }
204  else{ // Else anticlockwise direction
205  pos_diff = (signed long)(pos[0] - pos[1]); // Calc diff
206  if(pos_diff<0){
207  pos_diff += 0xFFFFFFFF; // Check underflow
208  }
209  }
210 
211  counts_per_sec = pos_diff * 10; // Pos_diff * frequency (10 Hz) --> 10 = (F_CPU / eQEP_module->QUPRD);
212  revolution_per_sec = (float) counts_per_sec / (g_lines_of_encoder_eQEP2 * 4.0); // Divide all QPOSCNTS with clocks genearted by one revolution
213  g_rpm_eQEP_2 = (revolution_per_sec * 60); // Calc rpm
214 
215  eQEP_module->QCLR |= 0xFFF; // Clear all Interrupt flags
216  TMC_BASE_PIE->ACK |= 0x10; // Interrupt ACK
217 }
218 
219 
220 #endif /* EQEP_EQEP_C_ */
_eQEPInterface::QEPB
Uint16 QEPB
QEPB GPIO (21/25)
Definition: eqep.h:15
TMC_BASE_PIE.h
PIE-Register header file.
g_lines_of_encoder_eQEP2
Uint16 g_lines_of_encoder_eQEP2
Definition: eqep.c:20
eQEPisr2
__interrupt void eQEPisr2(void)
Interrupt Service Routine of eQEPInterface2.
Definition: eqep.c:187
g_rpm_eQEP_1
Uint16 g_rpm_eQEP_1
Definition: eqep.c:17
float32
float float32
32 Bit Variable: Dezimalzahl
Definition: global_defines.h:24
int16
int int16
16 Bit Variable: - 32.768 .. 32.767
Definition: global_defines.h:17
IER
cregister volatile unsigned int IER
Generate reference to Interrupt Enable Register.
eqep.h
Header file for eQEP module.
eQEP_getRpm
int16 eQEP_getRpm(eQEPInterface eQEP)
Get rpm of rotary machine applied to eQEPInterface.
Definition: eqep.c:131
TMC_BASE_EQEP.h
eQEP-Register header file
_eQEPInterface::lines_of_encoder
Uint16 lines_of_encoder
Lines of applied encoder. See Data sheet of applied motor / encoder. 4 edges are sent on QEPA and QEP...
Definition: eqep.h:16
_TMS_EQEP::QEINT
TM_REG16 QEINT
Interrupt Enable Register.
Definition: TMC_BASE_EQEP.h:31
init_eQEP
int16 init_eQEP(eQEPInterface eQEP)
Initialization of eQEPInterface.
Definition: eqep.c:33
_TMS_EQEP::QDECCTL
TM_REG16 QDECCTL
Decoder Control Register.
Definition: TMC_BASE_EQEP.h:27
eQEPisr1
__interrupt void eQEPisr1(void)
Interrupt Service Routine of eQEPInterface1.
Definition: eqep.c:149
_eQEPInterface
eQEP Interface: Assign GPIOs to TMC_BASE_EQEP1 or TMC_BASE_EQEP2.
Definition: eqep.h:13
_TMS_EQEP::QEPCTL
TM_REG16 QEPCTL
Control Register.
Definition: TMC_BASE_EQEP.h:28
global_defines.h
Header file for global defines.
_TMS_EQEP
eQEP Register (TMC_BASE_EQEP1 / TMC_BASE_EQEP2).
Definition: TMC_BASE_EQEP.h:15
Uint16
unsigned int Uint16
16 Bit Variable: 0 .. 65.535
Definition: global_defines.h:21
TMC_BASE_INT_REGS.h
Interupt-Register header file.
_TMS_EQEP::QUPRD
TM_REG32 QUPRD
Unit Period Register.
Definition: TMC_BASE_EQEP.h:24
eQEP_getDirection
int16 eQEP_getDirection(eQEPInterface eQEP)
Get direction of rotary machine applied to eQEPInterface.
Definition: eqep.c:110
_eQEPInterface::QEPA
Uint16 QEPA
QEPA GPIO (20/24)
Definition: eqep.h:14
g_lines_of_encoder_eQEP1
Uint16 g_lines_of_encoder_eQEP1
Definition: eqep.c:19
_TMS_EQEP::QPOSMAX
TM_REG32 QPOSMAX
Maximum Position Count.
Definition: TMC_BASE_EQEP.h:18
TMC_BASE_PIO.h
GPIO-Register header file.
_TMS_EQEP::QEPSTS
TM_REG16 QEPSTS
Status Register.
Definition: TMC_BASE_EQEP.h:35
_TMS_EQEP::QCLR
TM_REG16 QCLR
Interrupt Clear Register.
Definition: TMC_BASE_EQEP.h:33
_TMS_EQEP::QPOSLAT
TM_REG32 QPOSLAT
Position Latch.
Definition: TMC_BASE_EQEP.h:22
Uint32
unsigned long Uint32
32 Bit Variable: 0 .. 4.294.967.295
Definition: global_defines.h:22
g_rpm_eQEP_2
Uint16 g_rpm_eQEP_2
Definition: eqep.c:18